# BOM generation

## I have created a new design. How do I create a BOM?

There are as many ways to export a BOM from your design as there are gEDA developers. Indeed, there are five or six different backends for gnetlist which enable you to export a BOM. Therefore, it’s easy for the newbie to be confused about which approach to use. A good, simple, and reasonably complete method is this:

- Create a file called “attribs” in your project directory. In this file, place each attrib whose value you wish to export on a separate line. You don’t need to include refdes. This is the one attribute which is assumed to exist for every component. Here’s an example attribs file:

      value
      Mfr
      Mfr_PN
      Vendor
      Vendor_PN

- Netlist your design using the following command:
  `gnetlist -v -g bom2 -o MyDesign.bom MyDesign.sch`
  Note that the `-v` flag will provide a verbose spew telling you what is going in gnetlist while it is running. This can be useful if you need to diagnose a problem with netlisting.
- With this command, gnetlist will dump a BOM into the file “MyDesign.bom”. The BOM items will be separated using a “:” (colon) character. Components with the same value are collected into a single line. You may then read this file into any spreadsheet program. Make sure to import the BOM as a .csv file, and specify the “:” character as the item separator.

Many other methods to create BOMs exist. Perhaps other geda-users will post their favorite methods here?!?!?

# DRCs

## How do I check my schematics?

You can check your schematics using the drc2 gnetlist’s backend. It will check your schematics for some common errors, like duplicate references, unconnected pins, unused slots and more.

Run the drc2 backend with the following command:

    gnetlist -g drc2 -o MyDesign.drc MyDesign.sch

With this command, the DRC output is written into the file “MyDesign.drc”. You can then view this file with a text editor and see the DRC warnings and errors.

## How do I see the DRC output in the screen, without writing to a file?

Run the drc2 backend with the following command:

    gnetlist -g drc2 -o - MyDesign.sch

This way, you will see the DRC output directly in your screen.

## I want to disable some of the schematic DRC checks. How can I do it?

The drc2 backend is highly configurable. You have to put some special commands into a file and use the “-l” option of gnetlist with it.

The most common commands are:

- (define dont-check-non-numbered-parts 1) ;; Disable the non-numbered parts check
- (define dont-check-duplicated-references 1) ;; Disable the duplicate references check
- (define dont-check-one-connection-nets 1) ;; Disable the check for nets with only one connection.
- (define dont-check-pintypes-of-nets 1) ;; Disable the pintype check
- (define dont-check-not-driven-nets 1) ;; Disable the driven net check
- (define dont-check-unconnected-pins 1) ;; Disable the unconnected pins check
- (define dont-check-duplicated-slots 1) ;; Disable the duplicated slots check
- (define dont-check-unused-slots 1) ;; Disable the unused slots check
- (define dont-check-slots 1) ;; Disable slot number check
- (define action-unused-slots #\w) ;; Output an unused slots as a warning
- (define action-unused-slots #\e) ;; Output an unused slots as an error
- (define action-unused-slots #\c) ;; An unused slot is OK.
- (define case_insensitive 1) ;; Do all checks case insensitive

There are some other advanced commands, to modify the DRC matrix and the pintype which can drive a net. See the backend file “gnet-drc2.scm” with a text editor. At the beginning there is the available documentation.

Copy the above lines you want into a file (for example “drc_rules.txt”), one per line, and run the drc checker:

    gnetlist -g drc2 -l drc_rules.txt -o MyDesign.drc MyDesign.sch

With this command, the DRC output is written into the file “MyDesign.drc”. You can then view this file with a text editor and see the DRC warnings and errors.

## Can I include the DRC checking into a Makefile and stop when errors or warnings are found?

Yes. The drc2 backend will return an error if there are errors or warnings, so you can add the following to your Makefile:

    $(objects).drc : $(objects).sch
              gnetlist -g drc2 $(objects).sch -o $(objects).drc

If you are going to simulate your design, then you can add the following to your Makefile:

    $(objects).cir : $(objects).sch $(objects).drc
              grep -v ERROR $(objects).drc >/dev/null 2>&1
              gnetlist -g spice-sdb $(objects).sch  -o $(objects).cir

If not, please use the above example and adapt it to your own workflow.

## There are some warnings in my design I'm aware of. Can I ignore the warnings in the return value?

Use the “-O ignore-warnings-in-return-value” option:

    gnetlist -g drc2 -o - MyDesign.sch -O ignore-warnings-in-return-value

Do this with caution! You will be missing all the warnings!

# Attribute management

## Help! My design has hundreds of components, and it's a pain to use gschem to attach all my attributes!

The answer here is the gEDA/gaf utility “gattrib”. Gattrib is an attribute editor for gEDA. It reads your .sch file(s) and creates a spreadsheet showing all components, nets, and pins in rows, with the associated attributes listed in the columns. Gattrib allows you to add, modify, or delete attributes outside of gschem, and then save the .sch files back out. Here’s a screenshot:

Note that gattrib is the gEDA Project’s current answer to the question of heavy symbols. That is, rather than putting all attributes (such as SPICE model files, footprint names, manufacturer part nos and the like), you are encouraged to put this information into your schematic using gattrib, where it is visible and easily manipulable with gattrib.

When using gattrib, make sure you exit gschem first. Gattrib and gschem both save your work into the same file, so you should have only one program running at a time to avoid conflicts. There is no lockfile mechanism in gEDA/gaf (yet), so it’s your responsibility to avoid conflicts.

## How do I know what footprint name to use for layout using PCB?

Answered here.