AVR Libc Home Page |  | AVR Libc Development Pages
Main Page | User Manual | Library Reference | FAQ | Alphabetical Index | Example Projects

iocompat.h
1 /*
2 * ----------------------------------------------------------------------------
3 * "THE BEER-WARE LICENSE" (Revision 42):
4 * <joerg@FreeBSD.ORG> wrote this file. As long as you retain this notice you
5 * can do whatever you want with this stuff. If we meet some day, and you think
6 * this stuff is worth it, you can buy me a beer in return. Joerg Wunsch
7 * ----------------------------------------------------------------------------
8 *
9 * IO feature compatibility definitions for various AVRs.
10 *
11 * $Id: iocompat.h 1638 2008-03-17 21:52:00Z joerg_wunsch $
12 */
13
14 #if !defined(IOCOMPAT_H)
15 #define IOCOMPAT_H 1
16
17 /*
18 * Device-specific adjustments:
19 *
20 * Supply definitions for the location of the OCR1[A] port/pin, the
21 * name of the OCR register controlling the PWM, and adjust interrupt
22 * vector names that differ from the one used in demo.c
23 * [TIMER1_OVF_vect].
24 */
25 #if defined(__AVR_AT90S2313__)
26 # define OC1 PB3
27 # define OCR OCR1
28 # define DDROC DDRB
29 # define TIMER1_OVF_vect TIMER1_OVF1_vect
30 #elif defined(__AVR_AT90S2333__) || defined(__AVR_AT90S4433__)
31 # define OC1 PB1
32 # define DDROC DDRB
33 # define OCR OCR1
34 #elif defined(__AVR_AT90S4414__) || defined(__AVR_AT90S8515__) || \
35 defined(__AVR_AT90S4434__) || defined(__AVR_AT90S8535__) || \
36 defined(__AVR_ATmega163__) || defined(__AVR_ATmega8515__) || \
37 defined(__AVR_ATmega8535__) || \
38 defined(__AVR_ATmega164P__) || defined(__AVR_ATmega324P__) || \
39 defined(__AVR_ATmega644__) || defined(__AVR_ATmega644P__) || \
40 defined(__AVR_ATmega1284P__)
41 # define OC1 PD5
42 # define DDROC DDRD
43 # define OCR OCR1A
44 # if !defined(TIMSK) /* new ATmegas */
45 # define TIMSK TIMSK1
46 # endif
47 #elif defined(__AVR_ATmega8__) || defined(__AVR_ATmega48__) || \
48 defined(__AVR_ATmega88__) || defined(__AVR_ATmega168__)
49 # define OC1 PB1
50 # define DDROC DDRB
51 # define OCR OCR1A
52 # if !defined(TIMSK) /* ATmega48/88/168 */
53 # define TIMSK TIMSK1
54 # endif /* !defined(TIMSK) */
55 #elif defined(__AVR_ATtiny2313__)
56 # define OC1 PB3
57 # define OCR OCR1A
58 # define DDROC DDRB
59 #elif defined(__AVR_ATtiny24__) || defined(__AVR_ATtiny44__) || \
60 defined(__AVR_ATtiny84__)
61 # define OC1 PA6
62 # define DDROC DDRA
63 # if !defined(OCR1A)
64 # /* work around misspelled name in avr-libc 1.4.[0..1] */
65 # define OCR OCRA1
66 # else
67 # define OCR OCR1A
68 # endif
69 # define TIMSK TIMSK1
70 # define TIMER1_OVF_vect TIM1_OVF_vect /* XML and datasheet mismatch */
71 #elif defined(__AVR_ATtiny25__) || defined(__AVR_ATtiny45__) || \
72 defined(__AVR_ATtiny85__)
73 /* Timer 1 is only an 8-bit timer on these devices. */
74 # define OC1 PB1
75 # define DDROC DDRB
76 # define OCR OCR1A
77 # define TCCR1A TCCR1
78 # define TCCR1B TCCR1
79 # define TIMER1_OVF_vect TIM1_OVF_vect
80 # define TIMER1_TOP 255 /* only 8-bit PWM possible */
81 # define TIMER1_PWM_INIT _BV(PWM1A) | _BV(COM1A1)
82 # define TIMER1_CLOCKSOURCE _BV(CS12) /* use 1/8 prescaler */
83 #elif defined(__AVR_ATtiny26__)
84 /* Rather close to ATtinyX5 but different enough for its own section. */
85 # define OC1 PB1
86 # define DDROC DDRB
87 # define OCR OCR1A
88 # define TIMER1_OVF_vect TIMER1_OVF1_vect
89 # define TIMER1_TOP 255 /* only 8-bit PWM possible */
90 # define TIMER1_PWM_INIT _BV(PWM1A) | _BV(COM1A1)
91 # define TIMER1_CLOCKSOURCE _BV(CS12) /* use 1/8 prescaler */
92 /*
93 * Without setting OCR1C to TOP, the ATtiny26 does not trigger an
94 * overflow interrupt in PWM mode.
95 */
96 # define TIMER1_SETUP_HOOK() OCR1C = 255
97 #elif defined(__AVR_ATtiny261__) || defined(__AVR_ATtiny461__) || \
98 defined(__AVR_ATtiny861__)
99 # define OC1 PB1
100 # define DDROC DDRB
101 # define OCR OCR1A
102 # define TIMER1_PWM_INIT _BV(WGM10) | _BV(PWM1A) | _BV(COM1A1)
103 /*
104 * While timer 1 could be operated in 10-bit mode on these devices,
105 * the handling of the 10-bit IO registers is more complicated than
106 * that of the 16-bit registers of other AVR devices (no combined
107 * 16-bit IO operations possible), so we restrict this demo to 8-bit
108 * mode which is pretty standard.
109 */
110 # define TIMER1_TOP 255
111 # define TIMER1_CLOCKSOURCE _BV(CS12) /* use 1/8 prescaler */
112 #elif defined(__AVR_ATmega32__) || defined(__AVR_ATmega16__)
113 # define OC1 PD5
114 # define DDROC DDRD
115 # define OCR OCR1A
116 #elif defined(__AVR_ATmega64__) || defined(__AVR_ATmega128__) || \
117 defined(__AVR_ATmega165__) || defined(__AVR_ATmega169__) || \
118 defined(__AVR_ATmega325__) || defined(__AVR_ATmega3250__) || \
119 defined(__AVR_ATmega645__) || defined(__AVR_ATmega6450__) || \
120 defined(__AVR_ATmega329__) || defined(__AVR_ATmega3290__) || \
121 defined(__AVR_ATmega649__) || defined(__AVR_ATmega6490__) || \
122 defined(__AVR_ATmega640__) || \
123 defined(__AVR_ATmega1280__) || defined(__AVR_ATmega1281__) || \
124 defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)
125 # define OC1 PB5
126 # define DDROC DDRB
127 # define OCR OCR1A
128 # if !defined(PB5) /* work around missing bit definition */
129 # define PB5 5
130 # endif
131 # if !defined(TIMSK) /* new ATmegas */
132 # define TIMSK TIMSK1
133 # endif
134 #else
135 # error "Don't know what kind of MCU you are compiling for"
136 #endif
137
138 /*
139 * Map register names for older AVRs here.
140 */
141 #if !defined(COM1A1)
142 # define COM1A1 COM11
143 #endif
144
145 #if !defined(WGM10)
146 # define WGM10 PWM10
147 # define WGM11 PWM11
148 #endif
149
150 /*
151 * Provide defaults for device-specific macros unless overridden
152 * above.
153 */
154 #if !defined(TIMER1_TOP)
155 # define TIMER1_TOP 1023 /* 10-bit PWM */
156 #endif
157
158 #if !defined(TIMER1_PWM_INIT)
159 # define TIMER1_PWM_INIT _BV(WGM10) | _BV(WGM11) | _BV(COM1A1)
160 #endif
161
162 #if !defined(TIMER1_CLOCKSOURCE)
163 # define TIMER1_CLOCKSOURCE _BV(CS10) /* full clock */
164 #endif
165
166 #endif /* !defined(IOCOMPAT_H) */

Automatically generated by Doxygen 1.8.3.1 on Sat Jun 22 2013.