Welcome to Telelogic Product Support
  Home Downloads Knowledgebase Case Tracking Licensing Help Telelogic Passport
Telelogic Rhapsody (steve huntington)
Decrease font size
Increase font size
Topic Title: System Specifications and Modeling
Topic Summary:
Created On: 30-Sep-2005 15:44
Status: Read Only
Linear : Threading : Single : Branch
Search Topic Search Topic
Topic Tools Topic Tools
Subscribe to this topic Subscribe to this topic
E-mail this topic to someone. E-mail this topic
Bookmark this topic Bookmark this topic
View similar topics View similar topics
View topic in raw text format. Print this topic.
 30-Sep-2005 15:44
User is offline View Users Profile Print this message


Brandi Carroll

Posts: 82
Joined: 22-Jul-2004

System Specifications and Modeling

Instructor-in-Charge: Dr. R. S. Shekhawat
Instructors: Dr. Raj Singh, Mr. Pawan Sharma
Birla Institute of Technology and Science
Pilani India

1.Scope and Objective:
This course gives an introduction to system requirement analysis, specification formalisms, system modeling issues, system modeling languages, Hardware Specification and verification languages, EDA tools and its applications.

2. Text Book:
1. "Specification and Design of Embedded Systems", by "D. D. Gajski, F. Vahid, S. Narayan and J. Gong", "Prentice-Hall", 1994.
2. UML for real design of Embedded Real Type System, by Luciano Lavagro, Grant Martin, Bran Selic, Kluwer Publications.

3. Reference Books:
"Embedded System Design : A Unified Hardware/Software Introduction", by "F. Vahid and T. Givargis", "Wiley", 2002
"Computers as Components : Principles of Embedded Computer System Design", by "W. Wolf", "Morgan Kaufmann", 2000.
"A SystemC Primer", by "J. Bhasker", "Second edition", "Star Galaxy Pub", 2004
Designing concurrent, distributed and real time applications with UML, by Gomma H
Real Time UML: Developing efficient Objects for embedded systems, by Bruce Powel Douglass & David Harel, 2nd edition.

4. Course Plan
Topics
Introduction to High Level Design
Requirement Analysis
Specification, formalism and modeling (UML)
System Modeling Language
Hardware Specification and Verification Languages
High level Synthesis, logic synthesis and EDA tools

5. Evaluation Scheme:

Component Weightage (%)
Test I 15 %
Test II 15 %
Lab 20 %
Assignments 10 %
Compre Exam 40 %
Report this to a Moderator Report this to a Moderator
Statistics
20925 users are registered to the Telelogic Rhapsody forum.
There are currently 0 users logged in.
You have posted 0 messages to this forum. 0 overall.

FuseTalk Standard Edition v3.2 - © 1999-2009 FuseTalk Inc. All rights reserved.