Assembly Statements

asm(opcode, operands);

char X[3];

asm(LBZ, R0, ADDR(X[2]));

liu    r3, 0 @X
lbz    r0, 01(r3) @X

#define X 5

asm(LIL, R2, X);

lil     r2, 05

asm(BEQ,CR0, ADDR(LABEL));  -- branch to LABEL

asm(LA, R3, ADDR(LABEL));  -- address of LABEL

asm(LA, R3,ADDR(SUBP));

void
init_ram()
{
    /*
    ** Perform ROM to RAM copy of the program's initialized data.
    **
    ** Copy rom data to ram images.  The values of statically 
    ** initialized data for ROM'd programs must reside in ROM, but 
    ** the variables must be in RAM to be modifiable.  Thus, both ROM 
    ** and RAM locations are specified in the linker directives file 
    ** for each data section.  The following code copies the data 
    ** values from the ROM locations to the corresponding RAM
    ** locations.
    */

    asm( LA, R10, DATA_INIT_TABLE);

do_copy:
    asm( LWZ, R11, ADDR(R10));            /* byte count       */
    asm( CMPI, CR0, R11, +0 );            /* if 0, all done   */
    asm( BEQ, CR0, done_copy);            /* if 0, all done   */
    asm( LWZ, R12, ADDR(R10+4));          /* ram              */
    asm( LWZ, R15, ADDR(R10+8));          /* rom              */

move_bytes:
    asm( LBZ, R16, ADDR( R15 ));         /* get byte          */
    asm( STB, R16, ADDR( R12 ));         /* store byte        */
    asm( ADDI, R11, R11, -1 );       /* decrement byte count  */
    asm( ADDI, R12, R12, +1 );      /* increment ram address  */
    asm( ADDI, R15, R15, +1 );      /* increment rom address  */
    asm( CMPI, CR0, R11, +0 );            /* if 0, all done   */
    asm( BGT, CR0, move_bytes);

    asm( ADDI, R10, R10, +12 );           /* next entry       */
    asm( B, do_copy);                     /* repeat           */

done_copy:
    return;
}

int test_machine_code (p1,p2,p3,p4,p5,p6,p7,p8,p9 : integer)
  {   
   asm(MR, R10, p1););         // (A) put p1 into register r10   
   asm(LWZ, R11, p9);          // (B) put p9 into register r11   
 ...

    asm(DATAB, '\n');;
    asm(DATAH, DIFF(L1, L2);
    asm(DATAW,0);

#include <asm.h>

int jump_table(register int index)
{
    register unsigned jaddr;
    register int offset;

    asm(LA, jaddr, TABLE);
    asm(SLWI, offset, index, 2);
    asm(LWZX, offset, jaddr, offset);
    asm(ADD, jaddr, jaddr, offset);
    asm(MTCTR, jaddr);
    asm(BCTR);

    TABLE:
        asm(DATAW, DIFF(L1,TABLE));
        asm(DATAW, DIFF(L2,TABLE));
        asm(DATAW, DIFF(L3,TABLE));

    L1:
        return 1;
    L2:
        return 2;
    L3:
        return 3;
}

asm(FADD, FR0, FR1, FR2);
register double pi = 3.14;
register double third = 1.0/3.0;

$r1:Ld

/*
**  ASM Description for the PowerPC
**
**  Copyright 1995 by Rational Software Corporation.  All Rights Reserved.
*/


#ifndef _ASM_H_
#define _ASM_H_

enum OPCODE {
    ADD = 8, ADD_O, ADD_O_R, ADD_R, ADDC, ADDC_O, 
    ADDC_O_R, ADDC_R, ADDE, ADDE_O, ADDE_O_R, ADDE_R, 
    ADDI, ADDIC, ADDIC_R, ADDIS, ADDME, ADDME_O, 
    ADDME_O_R, ADDME_R, ADDZE, ADDZE_O, ADDZE_O_R, 
    ADDZE_R, AND_OP = 42, AND_R, ANDC, ANDC_R, 
    ANDI_R, ANDIS_R = 48, B = 54, BA, BBF, BBFA, 
    BBFC, BBFCL, BBFL, BBFLA, BBFR, BBFRL, BBT, 
    BBTA, BBTC, BBTCL, BBTL, BBTLA, BBTR, BBTRL, 
    BC, BCA, BCCTR = 76, BCCTRL, BCL, BCLA, BCLR, 
    BCLRL, BCTR = 84, BCTRL, BDN, BDNA, BDNEQ, 
    BDNGE, BDNGT, BDNL, BDNLA, BDNLE, BDNLR, BDNLRL, 
    BDNLT, BDNNE, BDNNS, BDNSO = 101, BDZ, BDZA, 
    BDZEQ, BDZGE, BDZGT, BDZL, BDZLA, BDZLE, BDZLR, 
    BDZLRL, BDZLT, BDZNE, BDZNS, BDZSO = 117, BEQ, 
    BEQA, BEQCTR = 122, BEQCTRL, BEQL, BEQLA, BEQLR, 
    BEQLRL, BGE = 130, BGEA, BGECTR = 134, BGECTRL, 
    BGEL, BGELA, BGELR, BGELRL, BGT = 142, BGTA, 
    BGTCTR = 146, BGTCTRL, BGTL, BGTLA, BGTLR, 
    BGTLRL, BL = 154, BLA, BLE, BLEA, BLECTR = 160, 
    BLECTRL, BLEL, BLELA, BLELR, BLELRL, BLR = 168, 
    BLRL, BLT, BLTA, BLTCTR = 174, BLTCTRL, BLTL, 
    BLTLA, BLTLR, BLTLRL, BNE = 182, BNEA, BNECTR = 186, 
    BNECTRL, BNEL, BNELA, BNELR, BNELRL, BNS = 194, 
    BNSA, BNSCTR = 198, BNSCTRL, BNSL, BNSLA, BNSLR, 
    BNSLRL, BSO = 208, BSOA, BSOCTR = 212, BSOCTRL, 
    BSOL, BSOLA, BSOLR, BSOLRL, CMP = 229, CMPI, 
    CMPL, CMPLI, CNTLZW = 235, CNTLZW_R, CRAND, 
    CRANDC, CREQV, CRNAND, CRNOR, CROR, CRORC, 
    CRXOR, DCBF, DCBI, DCBST, DCBT, DCBTST, DCBZ, 
    DIVW = 262, DIVW_O, DIVW_O_R, DIVW_R, DIVWU, 
    DIVWU_O, DIVWU_O_R, DIVWU_R, ECIWX = 275, ECOWX, 
    EIEIO, EQV, EQV_R, EXTSB = 282, EXTSB_R, EXTSH, 
    EXTSH_R, FABS = 288, FABS_R, FADD, FADD_R, 
    FADDS, FADDS_R, FCMPO, FCMPU, FCTIW, FCTIW_R, 
    FCTIWZ, FCTIWZ_R, FDIV = 302, FDIV_R, FDIVS, 
    FDIVS_R, FMADD = 310, FMADD_R, FMADDS, FMADDS_R, 
    FMR, FMR_R, FMSUB = 318, FMSUB_R, FMSUBS, FMSUBS_R, 
    FMUL, FMUL_R, FMULS, FMULS_R, FNABS, FNABS_R, 
    FNEG, FNEG_R, FNMADD = 332, FNMADD_R, FNMADDS, 
    FNMADDS_R, FNMSUB = 338, FNMSUB_R, FNMSUBS, 
    FNMSUBS_R, FRES, FRES_R, FRSP, FRSP_R, FRSQRTE, 
    FRSQRTE_R, FSEL = 350, FSEL_R, FSUB, FSUB_R, 
    FSUBS, FSUBS_R, ICBI, ISYNC = 358, LA = 360, 
    LBZ = 362, LBZU, LBZUX, LBZX, LFD, LFDU, LFDUX, 
    LFDX, LFS, LFSU, LFSUX, LFSX, LHA, LHAU, LHAUX, 
    LHAX, LHBRX, LHZ, LHZU, LHZUX, LHZX, LIL, LIU, 
    LMW = 386, LSWI = 390, LSWX, LWARX = 395, LWBRX, 
    LWZ, LWZU, LWZUX, LWZX, MCRF = 406, MCRFS, 
    MCRXR, MFCR, MFCTR, MFDAR, MFDBATL, MFDBATU, 
    MFDEC, MFDSISR, MFEAR, MFFS, MFFS_R, MFIBATL, 
    MFIBATU, MFLR, MFMSR, MFPVR, MFSDR1, MFSPR, 
    MFSPRG, MFSR, MFSRIN = 429, MFSRR0, MFSRR1, 
    MFTBL, MFTBU, MFXER, MR, MR_R, MTCR, MTCRF, 
    MTCTR, MTDAR, MTDBATL, MTDBATU, MTDEC, MTDSISR, 
    MTEAR, MTFS, MTFS_R, MTFSB0, MTFSB0_R, MTFSB1, 
    MTFSB1_R, MTFSF, MTFSF_R, MTFSFI, MTFSFI_R, 
    MTIBATL, MTIBATU, MTLR, MTMSR, MTSDR1, MTSPR, 
    MTSPRG, MTSR, MTSRIN = 465, MTSRR0, MTSRR1, 
    MTTBL, MTTBU, MTXER, MULHW = 475, MULHW_R, 
    MULHWU, MULHWU_R, MULLI = 480, MULLW, MULLW_O, 
    MULLW_O_R, MULLW_R, NAND = 493, NAND_R, NEG, 
    NEG_O, NEG_O_R, NEG_R, NOP, NOR, NOR_R, OR_OP, 
    OR_R, ORC, ORC_R, ORI, ORIS = 508, RFI = 512, 
    RLWIMI = 522, RLWIMI_R, RLWINM, RLWINM_R, RLWNM, 
    RLWNM_R, SC = 530, SLW = 566, SLW_R, SLWI, 
    SLWI_R, SRAW = 580, SRAW_R, SRAWI, SRAWI_R, 
    SRW = 600, SRW_R, SRWI, SRWI_R, STB = 605, 
    STBU = 607, STBUX, STBX, STFD, STFDU, STFDUX, 
    STFDX, STFIWX, STFS, STFSU, STFSUX, STFSX, 
    STH, STHBRX, STHU, STHUX, STHX, STMW = 625, 
    STSWI = 627, STSWX, STW = 632, STWBRX, STWCX_R, 
    STWU, STWUX, STWX, SUBF = 639, SUBF_O, SUBF_O_R, 
    SUBF_R, SUBFC, SUBFC_O, SUBFC_O_R, SUBFC_R, 
    SUBFE, SUBFE_O, SUBFE_O_R, SUBFE_R, SUBFIC, 
    SUBFME, SUBFME_O, SUBFME_O_R, SUBFME_R, SUBFZE, 
    SUBFZE_O, SUBFZE_O_R, SUBFZE_R, SYNC = 664, 
    TLBIE = 674, TLBLD, TLBLI, TLBSYNC, TRAP = 694, 
    TRAPI, TW, TWEQ, TWEQI, TWGE, TWGEI, TWGT, 
    TWGTI, TWI, TWLE, TWLEI, TWLGE, TWLGEI, TWLGT, 
    TWLGTI, TWLLE, TWLLEI, TWLLT, TWLLTI, TWLNE, 
    TWLNEI, TWLT, TWLTI, TWNE, TWNEI, XOR_OP, XOR_R, 
    XORI, XORIS = 724, DATAB = 726, DATAH, DATAW

};

enum REGISTER {

  /* General Purpose Registers. */
  R0,
  R1, SP = R1,                    /* R1 = Stack pointer */
  R2,                            /* R2 = TOC or SDA2 BASE */
  R3, R4, R5, R6, R7, R8, R9,
  R10, R11, R12,
  R13,                            /* R13 = SDA BASE */
  R14,                            /* R14 = Stack limit */
  R15, R16, R17, R18, R19,
  R20, R21, R22, R23, R24, R25, R26, R27, R28, R29,
  R30,
  R31, FP = R31,                /* R31 = Frame pointer */

  /* Floating Point Registers. */
  FR0,  FR1,  FR2,  FR3,  FR4,  FR5,  FR6,  FR7,  FR8,  FR9,
  FR10, FR11, FR12, FR13, FR14, FR15, FR16, FR17, FR18, FR19,
  FR20, FR21, FR22, FR23, FR24, FR25, FR26, FR27, FR28, FR29,
  FR30, FR31,

  /* Condition Register Fields. */
  CR0, CR1, CR2, CR3, CR4, CR5, CR6, CR7,
 
  /* Floating Point Condition Register Fields. */
  FCR0, FCR1, FCR2, FCR3, FCR4, FCR5, FCR6, FCR7,

  /* STORAGE CONTROL REGISTERS. */
  SR0,  SR1,  SR2,  SR3,  SR4,  SR5, SR6, SR7, SR8, SR9,
  SR10, SR11, SR12, SR13, SR14, SR15,

  /* Special Purpose Registers. */
  SPR1    = 97,  XER    = SPR1,
  SPR4    = 98,  RTCU   = SPR4,
  SPR20   = 99,
  SPR5    = 100, RTCL   = SPR5,
  SPR21   = 101,
  SPR22   = 102, DEC    = SPR22,
  SPR8    = 103, LR     = SPR8,
  SPR9    = 104, CTR    = SPR9,
  SPR18   = 105, DSISR  = SPR18,
  SPR19   = 106, DAR    = SPR19,
  SPR25   = 109, SDR1   = SPR25,
  SPR26   = 110, SRR0   = SPR26,
  SPR27   = 111, SRR1   = SPR27,
  SPR272  = 112, SPRG0  = SPR272,
  SPR273  = 113, SPRG1  = SPR273,
  SPR274  = 114, SPRG2  = SPR274,
  SPR275  = 115, SPRG3  = SPR275,
  SPR282  = 116, EAR    = SPR282,
  SPR284  = 117, TBL    = SPR284,
  TBR268  = 118,
  SPR285  = 119, TBU    = SPR285,
  TBR269  = 120,
  SPR287  = 121, PVR    = SPR287,
  SPR528  = 122, IBAT0U = SPR528,
  SPR529  = 123, IBAT0L = SPR529,
  SPR530  = 124, IBAT1U = SPR530,
  SPR531  = 125, IBAT1L = SPR531,
  SPR532  = 126, IBAT2U = SPR532,
  SPR533  = 127, IBAT2L = SPR533,
  SPR534  = 128, IBAT3U = SPR534,
  SPR535  = 129, IBAT3L = SPR535,
  SPR536  = 130, DBAT0U = SPR536,
  SPR537  = 131, DBAT0L = SPR537,
  SPR538  = 132, DBAT1U = SPR538,
  SPR539  = 133, DBAT1L = SPR539,
  SPR540  = 134, DBAT2U = SPR540,
  SPR541  = 135, DBAT2L = SPR541,
  SPR542  = 136, DBAT3U = SPR542,
  SPR543  = 137, DBAT3L = SPR543,
  SPR952  = 138, MMCR0  = SPR952,
  SPR953  = 139, PMC1   = SPR953,
  SPR954  = 140, PMC2   = SPR954,
  SPR955  = 141, SIA    = SPR955,
  SPR959  = 142, SDA    = SPR959,
  SPR976  = 143, DMISS  = SPR976,
  SPR977  = 144, DCMP   = SPR977,
  SPR978  = 145, HASH1  = SPR978,
  SPR979  = 146, HASH2  = SPR979,
  SPR980  = 147, IMISS  = SPR980,
  SPR981  = 148, ICMP   = SPR981,
  SPR982  = 149, RPA    = SPR982,
  SPR1008 = 150, HID0   = SPR1008,
    SPR1009 = 151, HID1   = SPR1009,
  SPR1010 = 152, HID2   = SPR1010, IABR = SPR1010,
  SPR1013 = 153, HID5   = SPR1013, DABR = SPR1013,
  SPR1023 = 154, HID15  = SPR1023, PIR  = SPR1023
};

/*
**  Addressing modes.
**
**
**  Forms:
**    reg + const
**    reg + label
**    reg + ext
**    reg + code
**    reg - const
*/

# ifdef __cplusplus

enum OPERAND {};

typedef int SPACE_ID;               /* 0..3        */
typedef REGISTER SPACE_REGISTER;    /* SR0..SR7    */
typedef int DISPLACEMENT;
typedef char* STRING;
typedef int*  LABEL;

extern OPERAND ADDR(DISPLACEMENT);
extern OPERAND ADDR(REGISTER);
extern OPERAND ADDR(OPERAND);

extern OPERAND DIFF(LABEL, LABEL);

extern OPERAND EXT(STRING);
extern OPERAND EXT(STRING, DISPLACEMENT);

extern OPERAND SUBP_EXT(STRING);

//extern OPERAND operator+(REGISTER, REGISTER);
//extern OPERAND operator+(REGISTER, DISPLACEMENT);
//extern OPERAND operator+(REGISTER, LABEL);
//extern OPERAND operator-(REGISTER, DISPLACEMENT);

# else

enum OPERAND {_EMPTY_};

extern ADDR();
extern DIFF();
extern EXT();
extern SUBP_EXT();


#pragma builtin_asm ADDR;
#pragma builtin_asm DIFF;
#pragma builtin_asm EXT;
#pragma builtin_asm SUBP_EXT;
# endif

#endif